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| EP1C6T144I7N资料 | |
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EP1C6T144I7N PDF Download |
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File Size : 116 KB
Manufacturer:ALT Description:The EM39LV040 provides two software methods to detect the completion of a Program or Erase cycle in order to optimize the system write cycle time. The software detection includes two status bits: Data# Polling (DQ7) and Toggle Bit (DQ6). The End-of-Write detection mode is enabled after the rising edge of WE#, which initiates the internal Program or Erase operation. The actual completion of the write operation is asynchronous with the system; therefore, either a Data# Polling or Toggle Bit read may be simultaneously completed with the write cycle. If this occurs, the system may possibly get an erroneous result, i.e., valid data may appear to conflict with either DQ7 or DQ6. In order to prevent such spurious rejection, when an erroneous result occurs, the software routine should include an additional two times loop to read the accessed location. If both reads are valid, then the device has completed the write cycle, otherwise the rejection is valid. |
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| 1PCS | 100PCS | 1K | 10K | ||
| 价 格 | |||||
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型 号：EP1C6T144I7N 厂 家：ALT 封 装： 批 号：07743A 数 量：39 说 明：Bid Price |
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运 费： 所在地： 新旧程度： |
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