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MC68HC908JB8JDW资料 | |
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MC68HC908JB8JDW PDF Download |
File Size : 116 KB
Manufacturer:FRS Description: The HDB3 Decoder is responsible for decoding the HDB3 pseudo-ternary data on its inputs RXD1 and RXD2 into NRZ form to be output on the NRZ DATA OUT pin. In addition to this, the decoder circuit provides three alarm outputs. The first of these alarms is DOUBLE VIOLATION. As its name suggests, a logic high on this output denotes that two successive violations have been received with the same polarity, thus violating the HDB3 coding laws. The second alarm, LOSS OF INPUT, is used to denote that 11 consecu- tive zeros have been received on the RXD inputs. The final alarm output is AIS (all ones) This alarm goes high if less than 3 decoded zeros have been detected in the preceding RESET AIS = 1 period (i.e. between RESET AIS = 0 pulses) |
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1PCS | 100PCS | 1K | 10K | ||
价 格 | |||||
型 号:MC68HC908JB8JDW 厂 家:FRS 封 装: 批 号: 数 量:71 说 明:Bid Price |
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