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MC78L08ABDR2G资料 | |
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MC78L08ABDR2G PDF Download |
File Size : 116 KB
Manufacturer:ONS Description:The vertical sync interval is detected by integrating the composite sync pulses. The first broad pulse causes an internal capacitor to charge past a fixed threshold and raises an internal vertical flag. Once the vertical flag is raised, the positive edge of the next serration clocks out the vertical output. When the vertical sync interval ends, the first post equalizing pulse is unable to charge the capacitor sufficiently, causing the vertical interval flag to go high. The rising edge of the second post-equalizing pulse then clocks out the high flag to end the vertical sync pulse. The vertical output is clocked in and out and therefore is a fixed width. Since the vertical detector is designed as a true integrator, it provides improved noise immunity. |
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1PCS | 100PCS | 1K | 10K | ||
价 格 | |||||
型 号:MC78L08ABDR2G 厂 家:ONS 封 装: 批 号:0817(RG3 数 量:9635 说 明:Bid Price |
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运 费: 所在地: 新旧程度: |
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