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| P0850S资料 | |
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P0850S PDF Download |
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File Size : 116 KB
Manufacturer:PUL Description:The P0850S SHARC DSP is the first processor in a new family featuring Analog Devices Super Harvard Architecture. Easing portability, the P0850S is application source code compatible with first generation ADSP-2106x SHARC DSPs in SISD (Single Instruction, Single Data) mode. To take advantage of the processors SIMD (Single Instruction, Multiple Data) capability, some code changes are needed. Like other SHARCs, the P0850S is a 32-bit processor that is optimized for high performance DSP applications. The P0850S includes an 80 MHz core, a dual-ported on-chip SRAM, an integrated I/O processor with multiprocessing support, and multiple internal buses to eliminate I/O bottlenecks. |
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| 1PCS | 100PCS | 1K | 10K | ||
| 价 格 | |||||
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型 号：P0850S 厂 家：PUL 封 装： 批 号： 数 量：182 说 明：Bid Price |
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运 费： 所在地： 新旧程度： |
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| 联系人：刘先生，罗小姐，刘小姐，刘先生，王先生 |
| 电 话：0086-755-83576094,83576097,83576087,83576084,83979425 |
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