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PVU414S资料 | |
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PVU414S PDF Download |
File Size : 116 KB
Manufacturer:IR Description:The sampling, conversion, and activation of digital output SDO are initiated on the falling edge of CS. The serial clock SCLK is used for controlling the conversion rate and shifting data out of the converter. Furthermore, SCLK provides a mechanism to allow digital host processors to synchronize with the con- verter.Theseconvertersinterfacewith micro-processors or DSPs through a high-speed SPI compatible serial interface. There are no pipeline delays associated with the device. |
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1PCS | 100PCS | 1K | 10K | ||
价 格 | |||||
型 号:PVU414S 厂 家:IR 封 装: 批 号:0745(CIR 数 量:794 说 明:Bid Price |
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运 费: 所在地: 新旧程度: |
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